View MB89215_976969.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

ds07-12558-3e fujitsu semiconductor data sheet 8-bit proprietary microcontrollers cmos f 2 mc-8l mb89210 series MB89215/f217/p215/pv210 n n n n description the mb89210 series is a one-chip microcontroller that features a compact instruction set and contains a range of peripheral functions including timers, a serial interface, a/d converters and external interrupts. n n n n features ?f 2 mc-8l cpu core ? maximum memory spaces : 64 kbytes ? minimum instruction execution time : 0.32 m s to 5.12 m s (at 12.5 mhz) ? interrupt processing time : 2.88 m s to 46.08 m s (at 12.5 mhz) ? i/o port : max 22 ? 21-bit time base timer ? 8-bit pwm timer ? 8-/16-bit capture timer/counter : 2 ch ? watchdog timer ? 12-bit ppg timer (continued) n n n n package 30-pin plastic ssop 48-pin plastic qfp 48-pin ceramic mqfp (fpt-30p-m02) (fpt-48p-m13) (mqp-48c-p02)
mb89210 series 2 (continued) ? 10-bit a/d converter : 8 ch ?lin-uart ? 8-bit serial i/o ? external interrupt : 3 ch ? external or cr (built-in) oscillation clock, switchable ? low power consumption modes (stop modes, sleep modes) ? package : ssop-30,qfp-48, mqfp-48 ?cmos technology
mb89210 series 3 n n n n product lineup * : the minimum operating voltage varies with the operating frequency, the function and the connected ice. note : unless otherwise stated, clock periods and conversion times are for 10 mhz operation with the internal clock operating at maximum speed. part number MB89215 mb89f217 mb89p215 mb89pv210 parameter type for mass products (mask rom product) flash products (flash rom product) one-time product (for small-scale production) piggy back/ evaluation product (for development) rom capacity 16 kbyte (built-in rom) 32 kbyte (built-in flash memory) 16 kbyte (built-in prom) 32 kbyte (external eprom) ram capacity 512 byte 1 kbyte 512 byte 2 kbyte cpu functions number of basic instructions : 136 instruction bit length : 8 bits instruction length : 1 to 3 bytes data bit length : 1, 8, and 16 bits minimum instruction execution time : 0.32 m s to 5.12 m s (at 12.5 mhz) interruption processing time : 2.88 m s to 46.08 m s (at 12.5 mhz) ports general purpose i/o port 21 (also usable as resources) general purpose input port 1 21-bit time base timer 21 bits interrupt cycle : at 10 mhz (0.82 ms,3.3 ms,26.2 ms,419.4 ms) watchdog timer reset generation cycle : at 10 mhz (min 419.4 ms) 8-bit pwm timer 8-bit interval timer operation (supports square wave output, operating clock period : 0.4 m s to 25.6 m s) 8-bit resolution pwm operation (conversion period : 102.4 m s to 26.84 m s ) 8/16-bit capture timer counter 8-bit capture timer/counter 1 channel + 8-bit timer or 16-bit capture timer/counter 1 channel capable of event count operation and square wave output using external clock input with 8-bit timer 0 or 16-bit counter lin-uart full duplex, synchronous/asynchronous transfer (with start/stop bit), capable of setting over 30,000 different baud rates using a 15-bit reload counter support for the lin protocol, slave nodes, and lin synch break/sync field detection 8-bit serial i/o 8-bit length, selectable lsb first or msb first transfer clock (0.8 m s external, 0.8 m s, 3.2 m s, 12.8 m s internal) 12-bit ppg timer output requency : selectable pulth width and cycle (cycle : 1.6 m s to 419.3 ms ) external interrupt circuit 3-channel (interrupt vector, request flag, requesr output acceptance) edge selectable (selectable rising, falling or both edge) can be use for recovery from stop or sleep mode (edge detection also available in stop mode). a/d converter 10-bit accurasy 8-channel a/d conversion function (conversion time : 15.2 m s/10 mhz) continuous activation by an 8-/16-bit timer/counter output or time base timer output capable. standby mode sleep mode and stop mode operating voltage * 3.5 v to 5.5 v 3.5 v to 5.5 v 3.5 v to 5.5 v 3.5 v to 5.5 v cr(built-in) oscillator yes yes yes no peripheral functions
mb89210 series 4 n n n n packages and corresponding products o : yes : no *1 : adapter for 48-pin to 30-pin conversion (manufactured by sunhayato corp.) part number : 48qf-30sop-8l inquiry : sunhayato corp. tel : (81)-3-3984-7791 fax : (81)-3-3971-0535 e-mail : adapter@sunhayato.co.jp *2 : adapter for 48-pin (eva) to 48-pin (mask/flash) conversion. part number : 48qf2-48qf2-8l-fj inquiry : sunhayato corp. tel : (81)-3-3984-7791 fax : (81)-3-3971-0535 e-mail : adapter@sunhayato.co.jp n n n n differences among products 1. memory space when this product is used in a piggy-back or other evaluation configuration, it is necessary to carefully confirm the differences between the model being used and the product it is evaluating. 2. current consumption ? on the mb89pv210, the additional current consumed by the eprom is added at the connecting socket on the back side. ? when operating at low speed, the current consumption in the one-time prom or eprom models is greater than on the mask rom models. however, current consumption in sleep or stop modes is identical. however, in sleep/stop mode the current consumption is the same. package MB89215 mb89f217 mb89p215 mb89pv210 fpt-30p-m02 o o * 1 fpt-48p-m13 o o * 2 mqp-48c-p02 o power supply pins vcc,vss 2 vcc, vss 3, avcc, avss vcc,vss 2 vcc, vss 2, avcc, avss
mb89210 series 5 n n n n pin assignment (continued) 27 26 25 24 23 22 21 20 19 18 17 1 2 3 4 5 6 7 8 9 10 11 12 28 13 14 16 15 29 30 vss c x0 x1 moda p31 rst p04/int0 p05/int1 p06/int2 p07/ec0 p10/sck p11/so p12/si p13/to0 p03/an7 p21/an1 p22/an2 p23/an3 p00/an4 p01/an5 p02/an6 p17/ppg p30/pwm/to1 vcc vss p20/an0 p14/uck/ec1 p15/uo p16/ui (fpt-30p-m02) (top view) 1 2 3 4 5 6 11 12 10 9 8 7 36 35 34 33 32 31 26 25 27 28 29 30 48 47 46 45 44 43 38 37 39 40 41 42 13 14 15 16 17 18 23 24 22 21 20 19 n.c. p07/ec0 p06/int2 p05/int1 p04/int0 v ss v cc p03/an7 p02/an6 p01/an5 mod1 mod0 n.c. n.c. p31 p10/sck p11/so p12/si v ss p13/to0 p14/uck/ec1 p15/uo p16/ui n.c. moda rst n.c. n.c. n.c. n.c. c v ss x1 x0 p30/pwm/to1 n.c. p00/an4 p23/an3 p22/an2 p21/an1 p20/an0 n.c. n.c. n.c. av ss av cc n.c. p17/ppg (top view) (fpt-48p-m13)
mb89210 series 6 (continued) (top view) (mqp-48c-p02) n.c. : internal connection only. not for use. pin no. pin pin no. pin pin no. pin pin no. pin 49 vpp 57 n.c. 65 o4 73 oe 50a1258a266o574n.c. 51 a7 59 a1 67 o6 75 a11 52 a6 60 a0 68 o7 76 a9 53 a5 61 o1 69 o8 77 a8 54 a4 62 o2 70 ce 78 a13 55 a3 63 o3 71 a10 79 a14 56 n.c. 64 v ss 72 n.c. 80 v cc 27 26 25 p00/an4 p03/an7 p30/pwm/to1 1 2 3 4 5 6 7 8 9 10 11 12 x1 moda p07/ec0 p10/sck p11/so p31 p12/si 28 n.c. 29 30 p13/to0 avss n.c. n.c. avcc 13 14 15 16 17 18 19 20 21 22 23 24 33 32 31 34 35 36 p06/int2 p05/int1 p04/int0 n.c. vss 48 47 46 45 44 43 42 41 40 39 38 37 68 67 66 65 64 63 62 61 7 7 7 8 7 9 8 0 4 9 5 0 51 5 2 60 59 58 57 56 55 54 53 69 70 71 72 73 74 75 76 p01/an5 p02/an6 rst x0 vss vcc p14/uck/ec1 p15/uo p16/ui p17/ppg p20/an0 p23/an3 p22/an2 p21/an1 n.c. n.c. n.c. n.c. n.c. n.c. n.c. n.c. n.c. n.c. n.c. n.c. n.c.
mb89210 series 7 n n n n pin descriptions (continued) pin no. pin name circuit type function ssop* 1 qfp* 2 mqfp* 3 10 10 4 x0 a connecting pins to crystal oscillator or other oscillator. when using ecternal clock, input to x0 and x1 is left open. 995 x1 ? 37 ? mod0 c/d 1 * 4 input pins for memory access mode setting. connect directly to v ss . ? 38 ? mod1 input pins for memory access mode setting. connect directly to v ss . 512modac/d 2 * 5 input pins for memory access mode setting. connect directly to v ss . 623rst e reset i/o pin. this pin has pull-up resistance with n-ch open drain or hyster- esis input. at an internal reset request, an l signal is output. an l level input initializes the internal circuits. 27 to 30 36, 39 to 41 25 to 28 p00/an4 to p03/an7 g general purpose i/o port. hysteresis input. these pins also functions as the analog input of a/d converter. 1 to 3 44 to 46 46 to 48 p04/int0 to p06/int2 f general purpose i/o port. these pins also functions as the external interrupt input. hysteresis input. 447 1p07/ec0 general purpose i/o port. this pin also functions as external clock of 8-/16-bit capture timer/counter 0 or capture input pin. hysteresis input. 13 16 10 p10/sck general purpose i/o port. this pin also functions as clock input/output pin of serial i/o. hysteresis input. 14 17 11 p11/so general purpose i/o port. this pin also functions as the data output pin of serial i/o. hysteresis input. 15 18 12 p12/si general purpose i/o port. this pin also functions as the data input pin of serial i/o. hysteresis input. 16 20 13 p13/to0 general purpose i/o port. this pin also functions as the output pin of 8-/16-bit capture timer/counter 0. hysteresis input. 17 21 14 p14/uck/ ec1 general purpose i/o port. this pin also functions as the clock input/output pin of lin- uart and the external clock of 8-/16-bit capture timer/counter 1 or capture input pin. hysteresis input. 18 22 15 p15/uo general purpose i/o port. this pin also functions as the data output pin of lin-uart. hysteresis input
mb89210 series 8 (continued) *1 : fpt-30p-m02 *2 : fpt-48p-m13 *3 : mqp-48c-p02 *4 : mb89f217 is c. *5 : mb89f217 and mb89p215 are c. pin no. pin name circuit type function ssop* 1 qfp* 2 mqfp* 3 19 23 16 p16/ui h general purpose i/o port. this pin also functions as the data input pin of lin-uart. general port input is hysteresis and resource input is cmos. 20 25 17 p17/ppg f general purpose i/o port. this pin also functions as 12-bit ppg timer output. hysteresis input. 23 to 26 32 to 35 21 to 24 p20/an0 to p23/an3 g general purpose i/o port. shared for a/d converter analog input pin. hysteresis input. 11 11 8 p30/pwm/ to1 f general purpose i/o port. this pin also functions as the output pin of 8-bit pwm and 8-/ 16-bit capture timer/counter 1. hysteresis input. 12 15 9 p31 b general purpose i/o port of cmos type. 21 42 7 v cc ? power supply pin. 8,22 8, 19, 43 6,43 v ss ? power supply pin (gnd). use the both pins at the same voltage level. ? 27 20 av cc ? a/d converter power supply pin. apply potential under v cc to this pin. ? 28 19 av ss ? a/d converter power supply pin (gnd). use at the same voltage level as the v ss supply. 77 ? c ? this is the power supply stabilization capacitor pin for mb89f217 and mb89p215. connect an external capacitor of 0.1 m f. MB89215 is not internally connected. it is unnecessary to con- nect a capacitor. ? 3 to 6, 12 to 14, 24, 26, 29 to 31, 48 18, 29 to 42, 44,45 n.c. ? internal connect pin. be sure this pin is left open.
mb89210 series 9 n n n n external eprom pin description (mb89pv210 only) pin no. pin name i/o function 49 vpp o h level output pin. 50 51 52 53 54 55 58 59 60 a12 a7 a6 a5 a4 a3 a2 a1 a0 o address output pin. 61 62 63 o1 o2 o3 i data input pin. 64 v ss o power supply pin (gnd). 65 66 67 68 69 o4 o5 o6 o7 o8 i data input pin. 70 ce o chip acceptance pin for rom. output h at standby. 71 a10 o address output pin. 73 oe o output acceptance pin for rom. output l usually. 75 76 77 78 79 a11 a9 a8 a13 a14 o address output pin. 80 v cc o power supply pin for eprom. 56 57 72 74 n.c. ? internal connect pin. must be left open.
mb89210 series 10 n n n n i/o circuit type (continued) type circuit remarks a ? oscillator feedback resistance : approx. 1 m w b ?cmos input c ? hysteresis input d 1 ?open d 2 ? with pull-down resistance : approx. 50 k w (5v) ? hysteresis input e ? output pull-up resistance (pch) approx. 50 k w (5v) ? hysteresis input f ?cmos output ? hysteresis input ? selectable by pull-up resistor register x1 x0 standby control signal pch nch pch nch pch pull-up control bit
mb89210 series 11 (continued) type circuit remarks g ? cmos output ? hysteresis input ? analog input ? selectable by pull-up resistor register h ? cmos output ? hysteresis input ? cmos input ? selectable by pull-up resistor register pch pch nch pull-up control bit analog input a/d acceptance pch pch nch pull-up control bit
mb89210 series 12 n n n n handling devices 1. preventing latchup latchup may occur on cmos ics if voltage higher than v cc or lower than v ss is applied to input or output pins other than the medium-and high-voltage pins or if voltage higher than the rating is applied between v cc and v ss . when latchup occurs, power supply current increases rapidly and might thermally damage elements. when using, take great care not to exceed the absolute maximum ratings. also, take care to prevent the analog input from exceeding the digital power supply (v cc ) when the analog system power supply is turned on and off. to supply power, turn on the digital power supply (v cc ) and then the analog power supply (av cc ). 2. treatment of unused input pins leaving unused input teminals open may lead to permanent damage due to malfunction and latchup; pull up or pull down the terminals through the resistors of 2 k w or more. make the unused i/o terminal in a state of output and leave it open and if it is in an input state, handle it with the same procedure as the input terminals. 3. treatment of n.c. pins any pins marked nc (not connected) must be left open. 4. power supply voltage fluctuations although vcc power supply voltage is assured to operate within the rated range, a rapid fluctuation of the voltage could cause malfunctions even if it occurs within the rated range. stabilizing voltage supplied to the ic is therefore important.as stabilization guidelines, it is recommended to control power so that v cc ripple fluctuations (p-p value) will be less than 10% of the standard v cc value at the commercial frequency (50 to 60 hz) and the transient fluctuation rate will be less than 0.1 v/ms. 5. treatment of power supply pin all v ss power suppluy pin must be use at the same voltage level. connect to be av cc = v cc , av ss = v ss even if the a/d converters are not in use in mb89pv210. 6. notes on using external clock when an external clock is used, oscillation stabilization time is required for even power-on reset and release from stop mode. 7. notes on using the cr (internal) oscillator to use the cr (internal) oscillator as the operating clock for the MB89215, mb89f217 or mb89p215, adjust the timer value and baud rate setting. 8. program execution in ram when the mb89pv210 is used with an emulation pod other than the mb2144-508, no program can be executed in ram. 9. operation check for evaluating the lin-uart when the MB89215, mb89f217 or mb89p215 uses the cr (internal) oscillator as the clock for the lin-uart, the evaluation program (mb89pv210 [customized for external oscillation]) requires an operation check within a range of oscillation frequencies from 8.5 mhz to 11.5 mhz.
mb89210 series 13 10. handling reset pin reset pin must be inputted external reset. 11. up/down conversion circuit stabilization waiting time mb89210 series contains the following products and the operating characteristics vary with whether they contain the internal stepdown circuit. * : the minimum operating voltage varies with the operating frequency, the function and the connected ice. the same built-in resources are used for the above product types; operating sequences after the power-on reset are different depending on whether they have the internal voltages step-down circuit. the operating sequences after the power-on reset with the different models will be described below. as described above, cpu starts at delayed time with the product having the internal voltage step-down circuit compared with the product not having the internal voltage step-down circuit. this is because the time should be allowed for the stabilization time for voltage step-down circuit for normal operation. note : as the period of the oscillation is unstable immediately after oscillation starts, the listed oscillation stabilization delay times are guides only. 12. treatment of analog input the analog input also serves as a general-purpose input/output port. the a/d enable register is initialized at a reset. when the intermediate-level signal is input in port input mode (aden:adex = 0), an input leakage current flows to the gate. set the corresponding pin to an analog input. product name operating voltage * down conversion MB89215 3.5 v to 5.5 v not built-in mb89f217 3.5 v to 5.5 v built-in mb89p215 3.5 v to 5.5 v built-in mb89pv210 3.5 v to 5.5 v not built-in (2 18 /f ch * ) (2 17 /f ch-2 * ) (2 18 /f ch * ) step-down circuit stabilization waiting time + oscillation stabilization waiting time power supply (v cc ) cpu operation of built-in down-conversion circuit product (mb89f217, mb89p215) cpu operation of built-in down-conversion circuit product (MB89215,mb89pv210) oscillation stabilization waiting time start of cpu operation for the product not having the internal voltage step-down circuit (reset vector) start of cpu operation for the product having the internal voltage step-down circuit (reset vector) * : f ch-2 : cr (built-in) oscillation f ch : base oscillator
mb89210 series 14 n n n n programming and erasing flash memory on the mb89f217 1. flash memory the flash memory is located between 8000 h and ffff h in the cpu memory map and incorporates a flash memory interface circuit that allows read access and program access from the cpu to be performed in the same way as mask rom. programming and erasing flash memory is also performed via the flash memory interface circuit by executing instructions in the cpu. this enables the flash memory to be updated in place under the control of the cpu, providing an efficient method of updating program and data. 2. flash memory features ? 32 k byte 8-bit configuration : (16 k + 8 k + 8 k sectors) ? automatic programming algorithm (embedded algorithm* : equivalent to mbm29lv200) ? includes an erase pause and restart function ? data polling and toggle bit for detection of program/erase completion ? detection of program/erase completion via cpu interrupt ? compatible with jedec-standard commands ? sector erasing (sectors can be combined in any combination) ? no. of program/erase cycles : 10,000 (min) * : embedded algorithm is a trademark of advanced micro devices. 3. procedure for programming and erasing flash memory programming and reading flash memory cannot be performed at the same time. accordingly, to program or erase flash memory, the program must first be copied from flash memory to ram so that programming can be performed without program access from flash memory. 4. flash memory register control status register (fmcs) 5. sector configuration the table below shows the sector configuration of flash memory and lists the address of each sector for both during cpu access a flash memory programming. sector configuration of flash memory * : the programmer address is the address to be used instead of the cpu address when programming data from a parallel flash memory programmer. use the programmer address on programming or erasing using a general- purpose parallel programmer. address 007a h initial value 0 0 0 x 0 0 - 0 b flash memory cpu address programming address* 16 k bytes ffff h to c000 h 1ffff h to 1c000 h 8 k bytes bfff h to a000 h 1bfff h to 1a000 h 8 k bytes 9fff h to 8000 h 19fff h to 18000 h bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 inte rdyint we rdy - r/w r/w r/w r/w r/w r/w - r reserved reserved reserved
mb89210 series 15 6. rom writer adapters and recommended rom writers *1 : for the writer version and type code, please check the device list in homepage of the flash support group, inc as follow ; http://www.j-fsg.co.jp/ *2 : in addition to this adaptor, the conversion basis is required conversion basis : h910-1148 inquiries : sunhayato corp. tel : (81) -3-3984-7791 fax : (81) -3-3971-0535 e-mail : adapter@sunhayato.co.jp flash support group, inc fax : (81) -53-428-8377 minato electronics inc. tel : (81) -45-591-5611 fax : (81) -45-592-2854 part number package name applicable adapter model recommended writer sunhayato corp. ando electric co., ltd. minato electronics inc. mb89f217pfm fpt-48p-m13 flash-48qf2-32dp-8lf af9708* 1 af9709/09b* 1 model-1890a* 2 ver2.8 or more
mb89210 series 16 n n n n programming to otprom on the mb89p215 1. memory space 2. programming to the otprom to program to the otprom using an eprom programmer af220/af210/af120/af110 (manufacturer : yokoga- wa digital computer corp.). inquiry : yokogawa digital computer corp. : tel(81)-42-333-6224 note : programming to the otprom with mb89p215 is serial programming mode only. 3. programming adaptor for otprom to program to the otprom using an eprom programmer af220/af210/af120/af110, use the programming adapter (manufacturer : sunhayato corp.) listed below. adaptor socket : rom3-fpt30m02-8l3 inquiry : sunhayato corp. : tel : (81)-3-3984-7791 fax : (81)-3-3971-0535 e-mail : adapter@sunhayato.co.jp 4. programming yields all bits cannot be programmed at fujitsu shipping test to a blanked otprom microcomputer, due to its nature. for this reason, a programming yield of 100 % cannot be assured at all times. 0000 h 0080 h 0280 h c000 h ffff h c000 h ffff h i/o ram 512 byte prom 16 kbyte prom 16 kbyte corresponding addresses on serial writer normal operation mode address address prohibited
mb89210 series 17 n n n n eprom writing to piggy-back/evaluation chips 1. eprom model mbm27c256a-20tvm 2. writer adapter for writing to eprom using a rom writer, use one of the writer adapters shown below (manufactured by sunhayato) . inquiries should be addressed to sunhayato corp. : tel : (81)-3-3984-7791 fax : (81)-3-3971-0535 e-mail : adapter@sunhayato.co.jp 3. memory space shown below the memory space in each mode. 4. writing to eprom (1) set up the eprom writer for the mbm27c256a. (2) load program data on to the eprom programmer at 0000 h to 7fff h . (3) program 0000 h to 7fff h with the eprom programmer. package adapter socket model lcc-32 rom-32lc-28dp-s 0000 h 0080 h 0880 h 8000 h ffff h 0000 h 7fff h i/o ram 2 kbyte prom 32 kbyte eprom 32 kbyte corresponding address on rom writer normal operation mode address address prohibited
mb89210 series 18 n n n n block diagram rst x0 x1 rom f 2 mc-8l cpu vcc, vss, moda, mod0, mod1, c lin - uart 4 p20 / an0 to p23/an3 4 4 p13/to0 p17/ppg p10/sck p12/si p11/so p14/uck/ec1 p30/pwm/to1 p15/uo p16/ui p07/ec0 p04/int0 p05/int1 p06/int2 3 p00/an4 to p03/an7 4 p31 cr (built-in) oscillator oscillation circuit time base timer general-purpose i/o ports pll clock control 8 bits pwm 8/16-bit serial i/o external interrupt reset circuit general-purpose i/o ports 8-/16-bit capture timer/counter 1 8/16-bit capture timer/counter 0 capture input switching circuit baud rate generator a/d converter general-purpose i/o ports general-purpose i/o ports 12-bit ppg built-in data bus port 3 port 2 port 1 port 0 ram other pins
mb89210 series 19 n n n n cpu core 1. memory space the mb89210 series has 64 kb of memory space, containing all i/o, data areas, and program areas. the i/o area is located at the lowest addresses, with the data area placed immediately above. the data area can be partitioned into register areas, stack areas, or direct access areas depending on the application. the program area is located at the opposite end of memory, closest to the highest addresses, and the highest part of this area is assigned to the tables of interrupt and reset vectors and vector call instructions. the following diagram shows the structure of memory space in the mb89210 series. i/o ram 512 byte rom 16 kbyte 0000 h 0080 h 0100 h ffff h 0200 h 0280 h c000 h MB89215 prohibited register i/o ram 1 kbyte rom 32 kbyte 0000 h 0080 h 0100 h ffff h 0200 h 0480 h 8000 h mb89f217 prohibited register i/o prom 16 kbyte mb89p215 0000 h 0080 h 0100 h ffff h 0200 h 0280 h c000 h ram 512 byte prohibited register i/o rom 32 kbyte mb89pv210 0000 h 0080 h 0100 h ffff h 0200 h 0880 h 8000 h ram 2 kbyte prohibited register
mb89210 series 20 2. register the mb89210 series has two types of registers; the registers dedicated to specific purposes in the cpu and the general-purpose registers. the dedicated registers are as follows: program counter (pc) : 16-bit length, shows the locations where instructions are stored. accumulator (a) : 16-bit length, a temporary memory register for calculation operations. in the case of an 8-bit data processing instruction, the lower one byte is used. temporary accumulator (t) : 16-bit length, performs calculations with the accumulator. in the case of an 8-bit data processing instruction, the lower one byte is used. index register (ix) : 16-bit length, a register for index modification. extra pointer (ep) : 16-bit length, apointer indicating memory addresses. stack pointer (sp) : 16-bit length, indicates stack areas. program status (ps) : 16-bit length, contains register pointer and condition code. ps pc a t ix ep sp rp ccr 16 bits : program counter : accumulator : temporary accumulator : index register : extra pointer : stack pointer : program status fffd h initial value indeterminate indeterminate indeterminate indeterminate indeterminate i-flag = 0, il1, 0 = 11 initial values for other bits are indeterminate.
mb89210 series 21 the ps register can further be divided into the register bank pointer in the higher 8 bits (rp) and the condition code register in the lower 8 bits (ccr). (see the diagram below.) ps rp ccr x011xxxx b bit15 bit14 bit13 bit12 bit11 bit10 bit9 bit8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 r4 r3 r2 r1 r0 --- h i il1 il0 n z v c ccr initial value h-flag interrupt level bit i-flag n-flag 0-flag v-flag c-flag x : undefined
mb89210 series 22 the rp points to the address of the register bank currently in use. the relationship between the pointer contents and the actual address is based on the conversion rule shown next. the ccr consists of the bits indicating arithmetic operation results or transfer data contents and the bits that control cpu operations at the time of an interrupt. h flag : set to 1 if calculations result in carry operations from bit 3 to bit 4 or borrow operations from bit 4 to bit 3, otherwise set to 0. the flag is for decimal adjustment instructions; do not use for other than additions and subtractions. i flag : this flag is set to 1 if interrupts are enabled, and 0 if interrupts are prohibited. the default value at reset is 0. il1, 0 : indicates the level of the interrupt currently enabled. an interrupt is processed only if its level is higher than the value this bit indicates. il1 il0 interrupt level high-low 00 1 higher lower = no interruption 01 10 2 11 3 n flag : set to 1 if the highest bit is 1 after a calculation, otherwise cleared to 0. z flag : set to 1 if a calculation result is 0, otherwise cleared to 0. v flag : set to 1 if a 2s complement overflow results during a calculation, otherwise cleared to 0. c flag : set to 1 if a calculation results in a carry or borrow operation from bit 7, otherwise cleared to 0. this is also the shift-out value in a shift instruction. rule for conversion of actual addresses in the general-purpose register area "0" "0" "0" "0" "0" "0" "0" "1" r4 r3 r2 r1 r0 b2 b1 b0 a7 a6 a5 a4 a3 a2 a1 a0 a15 a14 a13 a12 a11 a10 a9 a8 generated address rp higher bits op code lower bits
mb89210 series 23 the following general-purpose registers are provided: general-purpose registers: 8-bit length, data storage registers the general-purpose registers are 8 bits in length and located in the register banks in the memory. one bank contains eight registers and the mb89210 series allow a total of 16 banks to be used at maximum. the bank currently in use is indicated by the register bank pointer (rp). register bank configuration r0 r1 r2 r3 r4 r5 r6 r7 this address = 0100h + 8 x (rp) memory area 16 banks
mb89210 series 24 n n n n i/o map (continued) address register name register description read/write initial value 0000 h pdr0 port 0 data register r/w xxxxxxxx 0001 h ddr0 port 0 direction register r/w 0 0 0 0 0 0 0 0 0002 h to 0006 h access prohibited 0007 h sycc system clock control register r/w 1 - - 1 1 1 0 0 0008 h stbc standby control register r/w 0 0 0 1 0 - - - 0009 h wdtc watchdog timer control register w 0 - - - xxxx 000a h tbtc time base timer control register r/w 0 0 - - - 0 0 0 000b h access prohibited 000c h pdr1 port 1 data register r/w xxxxxxxx 000d h ddr1 port 1 direction register r/w 0 0 0 0 0 0 0 0 000e h rsfr reset flag register r xxxx - - - - 000f h pdr2 port 2 data register r/w - - - - xxxx 0010 h ddr2 port 2 direction register r/w - - - - 0 0 0 0 0011 h access prohibited 0012 h pdr3 port 3 data register r/w - - - - - - xx 0013 h ddr3 port 3 direction register r/w - - - - - - - 0 0014 h rcr21 12-bit ppg control register 1 r/w 0 0 0 0 0 0 0 0 0015 h rcr22 12-bit ppg control register 2 r/w - - 0 0 0 0 0 0 0016 h rcr23 12-bit ppg control register 3 r/w 0 - 0 0 0 0 0 0 0017 h rcr24 12-bit ppg control register 4 r/w - - 0 0 0 0 0 0 0018 h access prohibited 0019 h tccr0 capture control register 0 r/w 0 0 0 0 0 0 0 0 001a h tcr10 timer 1 control register 0 r/w 0 0 0 - 0 0 0 0 001b h tcr00 timer 0 control register 0 r/w 0 0 0 0 0 0 0 0 001c h tdr10 timer 1 data 0 r/w xxxxxxxx 001d h tdr00 timer 0 data 0 r/w xxxxxxxx 001e h tcph0 capture data register h 0 r xxxxxxxx 001f h tcpl0 capture data register l 0 r xxxxxxxx 0020 h tcr20 timer output control 0 r/w - - - - - - 0 0 0021 h access prohibited 0022 h cntr pwm control register r/w 0 - 0 0 0 0 0 0 0023 h comr pwm compare register w xxxxxxxx 0024 h eic1 external interrupt control register 1 (edge) r/w 0 0 0 0 0 0 0 0 0025 h eic2 external interrupt control register 2 (edge) r/w 0 0 0 0 0 0 0 0
mb89210 series 25 (continued) address register name register description read/write initial value 0026 h access prohibited 0027 h 0028 h scr serial control register r/w 0 0 0 0 0 0 0 0 0029 h usmr lin-uart serial mode register r/w 0 0 0 0 0 0 0 0 002a h ssr serial status register r/w 0 0 0 0 1 0 0 0 002b h rdr recieving data register r 0 0 0 0 0 0 0 0 tdr sending data register w 1 1 1 1 1 1 1 1 002c h escr extended status control register r/w 0 0 0 0 0 x 0 0 002d h eccr extended communication control register r/w 0 0 0 0 0 - 1 1 002e h bgrh baud rate generator register h r/w - 0 0 0 0 0 0 0 002f h bgrl baud rate generator register l r/w 0 0 0 0 0 0 0 0 0030 h adc1 a/d control register 1 r/w 0 0 0 0 0 0 0 0 0031 h adc2 a/d control register 2 r/w 0 0 0 0 0 0 0 1 0032 h addh a/d data register h r/w 0 0 0 0 0 0 xx 0033 h addl a/d data register l r/w xxxxxxxx 0034 h aden a/d enable register r/w 0 0 0 0 0 0 0 0 0035 h to 0038 h access prohibited 0039 h smr serial mode register r/w 0 0 0 0 0 0 0 0 003a h sdr serial data register r/w xxxxxxxx 003b h to 0040 h access prohibited 0041 h tccr1 capture control register 1 r/w 0 0 0 0 0 0 0 0 0042 h tcr11 timer 1 control register 1 r/w 0 0 0 - 0 0 0 0 0043 h tcr01 timer 0 control register 1 r/w 0 0 0 0 0 0 0 0 0044 h tdr11 timer 1 data register 1 r/w xxxxxxxx 0045 h tdr01 timer 0 data register 1 r/w xxxxxxxx 0046 h tcph1 capture status register h1 r xxxxxxxx 0047 h tcpl1 capture status register l1 r xxxxxxxx 0048 h tcr21 timer output control register 1 r/w - - - - - - 0 0 0049 h tcsl capture input select register r/w - - - - - - - 0 004a h to 005f h access prohibited 0060 h xcrs* external/cr(built-in)oscillation clock control register r/w 0 0 - 0 0 0 1 0 0061 h to 006f h access prohibited
mb89210 series 26 (continued) * : only for MB89215, mb89f217, mb89p215 description of write/read symbols : r/w : read/write enabled r : read only w : write only description of initial values 0 : this bit initialized to 0. 1 : this bit initialized to 1. x : the initial value of this bit is undefined. - : this bit is not defined. note : if a bit manipulation instruction accesses the serial mode register (smr), a write-only register, or a register containing a write-only bit, the bit focused on by the instruction is set to a prescribed value but a malfunction occurs when the other bits contains a write-only bit. do not use bit manipulation instructions to access such registers. address register name register description read/write initial value 0070 h pul0 port 0 pull-up setting register r/w 0 0 0 0 0 0 0 0 0071 h pul1 port 1 pull-up setting register r/w 0 0 0 0 0 0 0 0 0072 h pul2 port 2 pull-up setting register r/w - - - - 0 0 0 0 0073 h pul3 port 3 pull-up setting register r/w - - - - - - - 0 0074 h to 0079 h access prohibited 007a h fmcs flash memory control status register r/w 0 0 0 0 0 0 - 0 007b h ilr1 interrupt level setting register 1 w 1 1 1 1 1 1 1 1 007c h ilr2 interrupt level setting register 2 w 1 1 1 1 1 1 1 1 007d h ilr3 interrupt level setting register 3 w 1 1 1 1 1 1 1 1 007e h ilr4 interrupt level setting register 3 w 1 1 1 1 1 1 1 1 007f h access prohibited
mb89210 series 27 n n n n electrical characteristics 1. absolute maximum ratings *1 : applicable to pins : p00 to p07, p10 to p17, p20 to p23, p30 to p31 use within recommended operating conditions. use at dc voltage (current) . the + b signal should always be applied with a limiting resistance placed between the + b signal and the microcontroller. the value of the limiting resistance should be set so that when the + b signal is applied the input current to the microcontroller pin does not exceed rated values, either instantaneously or for prolonged periods. note that when the microcontroller drive current is low, such as in the power saving modes, the + b input potential may pass through the protective diode and increase the potential at the v cc pin, and this may affect other devices. note that if a + b signal is input when the microcontroller current is off (not fixed at 0 v), the power supply is provided from the pins, so that incomplete operation may result. note that if the + b input is applied during power-on, the power supply is provided from the pins and the resulting supply voltage may not be sufficient to operate the power-on reset. care must be taken not to leave the + b input pin open. note that analog system input/output pins other than the a/d input pins (lcd drive pins, comparator input pins, etc.) cannot accept + b signal input. (continued) parameter symbol rating unit remarks min max power supply voltage v cc v ss - 0.3 v ss + 6.0 v input voltage v i v ss - 0.3 v cc + 0.3 v *2 output voltage v o v ss - 0.3 v ss + 6.0 v maximum clamp current i clamp - 0.4 + 0.4 ma *1 maximum clamp total current s | i clamp | ? 10 ma *1 l level output current i ol ? 10 ma l level average current i olav ? 4ma average value (operating current operating duty) l level total output current s i ol ? 50 ma h level output current i oh ? - 10 ma h level average current i ohav ? - 4ma average value (operating current operating duty) h level total output current s i oh ? - 50 ma power consumption pd ? 200 mw MB89215, mb89p215 ? 300 mw mb89f217 storage temperature tstg - 55 + 150 c
mb89210 series 28 (continued) sample recommended circuits : *2 : if the maximum current to/from an input is limited by some means with external components, the i clamp rating supersedes the v i rating. warning: semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. do not exceed these ratings. p-ch n-ch v cc r input/output equivalent circuits + b input (0 v to 16 v) limiting resistance protective diode
mb89210 series 29 2. recommended operating conditions warning: the recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. all of the devices electrical characteristics are warranted when the device is operated within these ranges. always use semiconductor devices within their recommended operating condition ranges. operation outside these ranges may adversely affect reliability and could result in device failure. no warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. users considering application outside the listed conditions are advised to contact their fujitsu representatives beforehand. parameter symbol value unit remarks min max power supply voltage v cc 3.5 5.5 v normal operation assurance range 3.0 5.5 v ram status in stop mode input h voltage v ih 0.7 v cc v cc + 0.3 v p31,ui v ihs 0.8 v cc v cc + 0.3 v moda, mod0, mod1, rst , p00 to p07, p10 to p17, p20 to p23, p30, int0 to int2, ec0, ec1, sck, si, uck input l voltage v il v ss - 0.3 0.3 v cc vp31,ui v ils v ss - 0.3 0.2 v cc v moda, mod0, mod1, rst , p00 to p07, p10 to p17, p20 to p23, p30, int0 to int2, ec0, ec1, sck, si, uck operating temperature ta - 40 + 105 c 6 5 4 3 2 1 1 10 3 2 057 69 8 4 13 12 11 range of warranted analog precision operation assurance range operating voltage (v) operating frequency (mhz)
mb89210 series 30 3. dc characteristics (v cc = 5.0 v 10 % , v ss = 0.0 v, f ch = 10 mhz (external clock), ta = - 40 c to + 105 c) parameter symbol pin name condition value unit remarks min typ max h level input voltage v ih p31,ui ? 0.7 v cc ? v cc + 0.3 v v ihs moda, mod0, mod1, rst , p00 to p07, p10 to p17,p20 to p23, p30, int0 to int2 , ec0, ec1, sck, si, uck ? 0.8 v cc ? v cc + 0.3 v l level input voltage v il p31,ui ? v ss - 0.3 ? 0.3 v cc v v ils moda, mod0, mod1, rst , p00 to p07, p10 to p17,p20 to p23, p30, int0 to int2 , ec0, ec1, sck, si, uck ? v ss - 0.3 ? 0.2 v cc v h level output voltage v oh p00 to p07, p10 to p17, p20 to p23, p30 vcc = 4.5 v, i oh = - 4.0 ma v cc - 0.5 ?? v l level output voltage v ol p00 to p07, p10 to p17, p20 to p23, p30, rst vcc = 4.5 v, i ol = 4.0 ma ?? 0.4 v input leak current i li p00 to p07, p10 to p17, p20 to p23, p30, p31, moda, mod0, mod1 0.45 v < v i < v cc ?? 5 m a without pull-up resistance specified pullup resistance r pull p00 to p07,p10 to p17, p20 to p23, p30, rst v i = 0.0 v 25 50 100 k w power supply current i cc v cc at normal operating (external clock, max gear speed) when a/d convereter stops ? 8 12 ma MB89215 ? 6 10 ma mb89f217 ? 6 9 ma mb89p215 when a/d convereter starts ? 11 15 ma MB89215 ? 8 13 ma mb89f217 ? 8 12 ma mb89p215 i ccs at sleep mode (external clock, max gear speed) when a/d convereter stops ? 4 6 ma MB89215 ? 35ma mb89f217, mb89p215 i cch at stop mode ta = + 25 c (external clock) when a/d convereter stops ?? 1 m a MB89215 ?? 10 m a mb89f217, mb89p215 input capacitance c in other than v cc and v ss ?? 515pf mb89f217, mb89p215
mb89210 series 31 4. ac characteristics (1) reset timing (v ss = 0.0 v, ta = - 40 c to + 105 c) * : t hcyl : oscillation clock one cycle time (2) power-on reset (v ss = 0.0 v, ta = - 40 c to + 105 c) note : the supply voltage must be set to minimum value required for operation within the prescribed default oscillation setting time. parameter symbol condition value unit remarks min max rst l level pulse width t zlzh ? 48 t hcyl * ? ns parameter symbol condition value unit remarks min max power on time t r ?? 50 ms power shutoff time t off ? 1 ? ms for repeated operation rst 0.2 v cc 0.2 v cc t zlzh v cc t r 2.0 v 0.2 v 0.2 v 0.2 v t off
mb89210 series 32 (3) clock timing (v ss = 0.0 v, ta = - 40 c to + 105 c) (4) instruction cycle (v ss = 0.0 v, ta = - 40 c to + 105 c) f ch : oscillation frequency (operating clock frequency after switching between external and cr (internal) oscillator clocks) parameter symbol condition value unit remarks min max clock frequency f ch-1 crystal or ceramic oscillation 1 12.5 mhz clock cycle time t xcyl 80 1000 ns input clock pulse width t wh t wl 20 ? ns input clock rise, fall time t cr t cf ? 10 ns oscillation frequency f ch-2 cr(built-in) oscillator 8.5 11.5 mhz parameter symbol value unit remarks instruction cycle (instruction execution time) t inst 4/f ch , 8/f ch , 16/f ch , 64/f ch m s when operating at f ch = 10 mhz t inst = 0.4 m s (4/f ch ) ? x0 and x1 timing and application conditions ? clock application conditions t xcyl t wh t cr t cf t wl 0.2 v cc 0.2 v cc 0.2 v cc 0.8 v cc 0.8 v cc x0 x0 x1 x0 x1 x0 x1 using crystal oscillator or ceramic oscillator using external clock open using cr (built-in) oscillator open
mb89210 series 33 (5) recommended resonator manufactures inquiry : murata electronics north america inc : tel + 1-404-436-1300 murata europe management gmbh : tel + 49-911-66870 murata electronics singapore (p/e) : tel + 65-758-4233 resonator manufacture resonator frequency (mhz) c 1 c 2 r murata mfg. co., ltd. cstls4m00g56-b0 4.00 built-in built-in 680 w cstcr4m00g55-r0 4.00 built-in built-in 680 w cstls8m00g53-b0 8.00 built-in built-in ? cstcc8m00g53-r0 8.00 built-in built-in ? cstls10m0g53-b0 10.00 built-in built-in ? cstcc10m00g53-r0 10.00 built-in built-in ? ? sample application of ceramic resonator x0 x1 r c 1 c 2
mb89210 series 34 (6) peripheral input timing (v cc = 5.0 v 10 % , v ss = 0.0 v, ta = - 40 c to + 105 c) *: for t inst see (4) instruction cycle. parameter symbol pin name value unit remarks min max peripheral input h pulse width t ilih int0 to int2, ec0, ec1 2 t inst * ?m s peripheral input l pulse width t ihil 2 t inst * ?m s int0 to int2, ec0 to ec1 t ilih t ihil 0.2 v cc 0.2 v cc 0.8 v cc 0.8 v cc
mb89210 series 35 (7) serial i/o timing (v cc = 5.0 v 10 % , v ss = 0.0 v, ta = - 40 c to + 105 c) *: for t inst see (4) instruction cycle. parameter symbol pin name condition value unit remarks min max serial clock cycle time t scyc sck internal clock operation 2 t inst * ?m s sck ? so time t slov sck, so - 200 200 ns valid si ? sck - t ivsh sck, si 0.5 t inst * ?m s sck - ? valid si hold time t shix sck, si 0.5 t inst * ?m s serial clock h pulse width t shsl sck external clock operation t inst * ?m s serial clock l pulse width t slsh sck t inst * ?m s sck ? so time t slov sck, so 0 200 ns valid si ? sck - t ivsh sck, si 0.5 t inst * ?m s sck - ? valid si hold time t shix sck, si 0.5 t inst * ?m s ? internal shift clock mode ? external shift clock mode sck so si t scyc t ivsh t slov t shix 0.8 v 0.8 v 2.4 v 0.8 v cc 0.2 v cc 0.8 v cc 0.2 v cc 0.8 v 2.4 v sck so si t ivsh t slov t shix 0.2 v cc 0.2 v cc 0.8 v 2.4 v 0.8 v cc 0.2 v cc 0.8 v cc 0.2 v cc 0.8 v cc 0.8 v cc t slsh t shsl
mb89210 series 36 (8) lin-uart timing (v cc = 5.0 v 10 % , v ss = 0.0 v, ta = - 40 c to + 105 c) *: for t inst see (4) instruction cycle. parameter symbol pin name condition value unit remarks min max serial clock cycle time t scyc uck internal clock operation 2 t inst * ?m s uck ? uo time t slov uck, uo - 200 200 ns valid ui ? uck - t ivsh uck, ui 0.5 t inst * ?m s uck - ? valid ui hold time t shix uck, ui 0 ?m s uck ? uo time t slov uck, uo - 200 200 ns scde = 1 uck (delay) ? uo time t sclk uck (delay), uo - 0.5 t inst * ?m sscde = 1 uck ? uck (delay) t sdel uck, uck (de- lay) 0.5 t inst * ?m sscde = 1 serial clock h pulse width t shsl uck external clock operation 1.5 t inst * ?m s serial clock l pulse width t slsh uck 1.5 t inst * ?m s uck ? uo time t slov uck, uo t inst * ?m s valid ui ? uck - t ivsh uck, ui 0 ?m s uck - ? valid ui hold time t shix uck, ui 0.5 t inst * ?m s
mb89210 series 37 ? internal shift clock mode ? external shift clock mode uck uo ui t scyc t ivsh t slov t shix 0.8 v 0.8 v 2.4 v 0.7 v cc 0.3 v cc 0.7 v cc 0.3 v cc 0.8 v 2.4 v uck(delay) scde=1 0.8 v 0.8 v 2.4 v t sdel t sclk uck uo ui t ivsh t slov t shix 0.2 v cc 0.2 v cc 0.8 v 2.4 v 0.7 v cc 0.3 v cc 0.7 v cc 0.3 v cc 0.8 v cc 0.8 v cc t slsh t shsl
mb89210 series 38 5. a/d converter (1) a/d converter electrical characteristics (v cc = 5.0 v + 10 % , v ss = 0.0 v, ta = - 40 c to + 105 c) * : for t inst see (4) instruction cycle in 4. ac characteristics. parameter symbol value unit remarks min typ max resolution ? ?? 10 bit total error - 5.0 ? + 5.0 lsb linearity error - 3.0 ? + 3.0 lsb differential linear error - 2.5 ? + 2.5 lsb zero transition voltage v ot v ss - 3.5 lsb v ss + 0.5 lsb v ss + 4.5 lsb v full-scale transition voltage v fst v cc - 6.5 lsb v cc - 1.5 lsb v cc + 2.0 lsb v a/d mode conversion time ?? ? 38 t inst * m s analog input current i ain ?? 10 m a analog input voltage range ? 0 ? v cc v
mb89210 series 39 (2) definition of a/d converter terms ? resolution the level of analog variation that can be distinguished by the a/d converter. when the number of bits is 10, analog voltage can be divided into 2 10 = 1024. ? linear error (unit : lsb) the deviation between the value along a straight line connecting the zero transition point(00 0000 0000 ?? 00 0000 0001) of a device and the full-scale transition point (11 1111 1111 ?? 11 1111 1110), compared with the actual conversion values obtained. ? differential linear error (unit : lsb) deviation of input voltage, which is required for changing output code by 1 lsb, from an ideal value. ? total error (unit : lsb) the difference between theoretical conversion value and actual conversion value. (continued) 3ff 3fe 3fd 004 003 002 001 v ss v cc v ot 0.5 lsb 1 lsb 1.5 lsb v fst ideal i/o characteristics analog input digital output 1 lsb = v fst - v ot 1022 (v) 3ff 3fe 3fd 004 003 002 001 v ss v cc v nt {1 lsb n + 0.5 lsb} total error analog input digital output total error in digital output n = v nt - {1 lsb n + 0.5 lsb} 1 lsb actual conversion characteristic actual conversion characteristic ideal characteristics
mb89210 series 40 (continued) 004 003 002 001 v ss 3ff 3fe 3fd 3fc v cc 3ff 3fe 3fd 004 003 002 001 v ss v nt v cc {1 lsb n + v ot } n + 1 n n - 1 n - 2 v ss v cc v nt v (n + 1) t zero transition error analog input full-scale transition error analog input digital output digital output linearity error analog input differential linear error analog input digital output digital output - 1 differential linear error in digital output n v ( n + 1 ) t - v nt 1 lsb actual conversion characteristic actual conversion characteristic v ot (measurement value) actual conversion characteristic v fst (measure- ment value) actual conversion characteristic actual conversion characteristic v ot (measurement value) v fst (measure- ment value) ideal characteristics actual conversion characteristic actual conversion characteristic ideal characteristics actual conversion characteristic linear error in digital output n v nt - {1 lsb n + v ot } 1 lsb ideal characteristics ideal characteristics = =
mb89210 series 41 (3) precautionary information of a/d conversion ? input impedance of analog input pins the a/d converter has a sample & hold circuit as shown below, which uses a sample-and-hold capacitor to obtain the voltage at the analog input pin for 16 instruction cycles following the start of a/d conversion. for this reason if the external circuits providing the analog input signal have high output impedance, the analog input voltage may not stabilize within the analog input sampling time. it is therefore recommended that the output impedance of external circuits be reduced to 4 k w or less. note that if the impedance cannot be kept low, it is recommended to connect an external capacitor of about 0.1 m f for the analog input pin. ? about errors the smaller the absolute value |v cc - v ss | is, the greater the relative error becomes. analog input equivalent circuit rc if analog input impedance is 4 k w or more, the use of a capacitor of ap- proximately 0.1 m f is recommend- ed. analog input pin sample-and-hold circuit comparator closes 16 instruction cycles after the start of a/d conversion analog channel selector MB89215 r = approx. 2.2 k w , c = approx. 45 pf mb89f217, mb89p215 r = approx. 2.6 k w , c = approx. 28 pf
mb89210 series 42 6. electrical characteristics of flash memory ? programming and erasing characteristics *1 : embedded algorithm executing. *2 : if a fault occurs during sector erasing, detection via dq 5 may not be available (dq 5 = 1 may not occur) . accordingly, a fault must be assumed after 15 s, even if dq 5 does not go to 1. parameter symbol pin name condition value unit remarks min typ max power supply current * 1 i fwe v cc v cc = 5.0 v ?? 40 ma sector erase time per 1 sector, constant value independent with sector capacitance successful completion time ?? ? ? 115s unsuccessful completion time ?? ? ?? *2 ? programming time per 1 byte successful completion time ?? ? ? 83600 m s unsuccessful completion time ?? ? ? 650 3600 m s
mb89210 series 43 n n n n example characteristics (1) power supply current (continued) vcc (v) 0 2 4 6 8 10 12 14 1234567 icc (ma) 12.5 mhz 10 mhz 8 mhz 4 mhz 1 mhz MB89215 external clock at normal operation (gear 4-frequency division) (i cc - v cc ) ta = + 25 c 0 1 2 3 4 1234567 vcc (v) icc (ma) 12.5 mhz 10 mhz 8 mhz 4 mhz 1 mhz MB89215 external clock at normal operation (gear 64-frequency division) (i cc - v cc ) ta = + 25 c 0 1 2 3 4 5 6 7 1234567 vcc (v) iccs (ma) 12.5 mhz 10 mhz 8 mhz 4 mhz 1 mhz MB89215 external clock at sleep (gear 4-frequency division) (i ccs - v cc ) ta = + 25 c 0 1 2 3 4 1234567 vcc (v) iccs (ma) 12.5 mhz 10 mhz 8 mhz 4 mhz 1 mhz MB89215 external clock at sleep (gear 64-frequency division) (i ccs - v cc ) ta = + 25 c - 2.0 0.0 2.0 4.0 6.0 8.0 10.0 12.0 - 50 - 25 0 25 50 75 100 125 150 i cch ( m a) MB89215 at stop (i cch - v cc ) f ch = 10 mhz, v cc = 5.5 v temperature ( c) 0 2 4 6 8 10 12 1234567 vcc (v) icc (ma) MB89215 cr (internal) oscillator at normal operation (gear 4-frequency division) (i cc - v cc ) ta = + 25 c
mb89210 series 44 (continued) (2) frequency characteristics 0 1 2 3 1234567 vcc (v) icc (ma) MB89215 cr (internal) oscillator at normal operation (gear 64-frequency division) (i cc - v cc ) ta = + 25 c - 2.0 0.0 2.0 4.0 6.0 8.0 10.0 12.0 - 50 - 25 0 25 50 75 100 125 150 i cch ( m a) mb89f217 at stop (i cch - v cc ) f ch = 10 mhz, v cc = 3.3 v temperature ( c) 0 1 2 3 4 5 6 1234567 vcc (v) iccs (ma) MB89215 cr (internal) oscillator at sleep (gear 4-frequency division) (i ccs - v cc ) ta = + 25 c - 2.0 0.0 2.0 4.0 6.0 8.0 10.0 12.0 - 50 - 25 0 25 50 75 100 125 150 i cch ( m a) mb89p215 at stop (i cch - v cc ) f ch = 10 mhz, v cc = 3.3 v temperature ( c) 7 7.5 8 8.5 9 9.5 10 10.5 11 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 90 c 25 c MB89215 cr (internal) oscillator frequency characteristics power supply voltage (v) frequency (mhz) 7 7.5 8 8.5 9 9.5 10 10.5 11 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 90 c 25 c mb89p215 cr (internal) oscillator frequency characteristics power supply voltage (v) frequency (mhz)
mb89210 series 45 (3) ad converter characteristics example - 3.5 - 3.0 - 2.5 - 2.0 - 1.5 - 1.0 - 0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 200 400 600 800 1000 MB89215 nonlinearity error v cc = 5.0 v, f ch = 10 mhz, ta = + 25 c error (lsb) conversion value - 3.0 - 2.5 - 2.0 - 1.5 - 1.0 - 0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0 200 400 600 800 1000 MB89215 differential linearity error v cc = 5.0 v, f ch = 10 mhz, ta = + 25 c error (lsb) conversion value - 5.5 - 4.5 - 3.5 - 2.5 - 1.5 - 0.5 0.5 1.5 2.5 3.5 4.5 5.5 0 200 400 600 800 1000 MB89215 total error v cc = 5.0 v, f ch = 10 mhz, ta = + 25 c error (lsb) conversion value
mb89210 series 46 n n n n mask options f ch : base oscillator * : initial value to which the oscillation setting time bit (sync : wt1, wt0) in the system clock control register is set. n n n n ordering information no part number MB89215 mb89f217 mb89p215 mb89pv210 specifying procedure setting disallowed 1 initial value* selection of internal clock oscillation stabilization wait time (at f ch = 10 mhz) ?01 : 2 14 /f ch (approx. 1.63 ms) ?10 : 2 17 /f ch (approx. 13.1 ms) ?11 : 2 18 /f ch (approx. 26.2 ms) 2 18 /f ch (approx. 26.2 ms) 2 power-on reset ?power-on reset on ?power-on reset off yes 3 reset pin output ? reset output on ? reset output off yes part number package remarks MB89215pfv mb89p215pfv 30-pin plastic ssop (fpt-30p-m02) MB89215pfm mb89f217pfm 48-pin plastic qfp (fpt-48p-m13) mb89pv210cf 48-pin ceramic mqfp (mqp-48c-p02)
mb89210 series 47 n n n n package dimensions (continued) 30-pin plastic ssop (fpt-30p-m02) note 1) *1 : resin protrusion. (each side + 0.15 (.006) max) . note 2) *2 : these dimensions do not include resin protrusion. note 3) pins width and pins thickness include plating thickness. note 4) pins width do not include tie bar cutting remainder. dimensions in mm (inches) note : the values in parentheses are reference values. c 2003 fujitsu limited f30003s-c-3-4 9.700.10(.382.004) 5.600.10 7.600.20 (.220.004) (.299.008) "a" (.007.001) 0.170.03 .009 C.003 +.003 C0.07 +0.08 0.24 index * 1 * 2 0.25(.010) 0.100.10 (.004.004) (stand off) details of "a" part (mounting height) 1.25 +0.20 C0.10 C.004 +.008 .049 0~8 ? 0.500.20 (.020.008) 0.600.15 (.024.006) 0.10(.004) 0.10(.004) 1 15 30 16 0.65(.026)
mb89210 series 48 (continued) 48-pin plastic qfp (fpt-48p-m13) note 1) * : these dimensions do not include resin protrusion. note 2) pins width and pins thickness include plating thickness. note 3) pins width do not include tie bar cutting remainder. dimensions in mm (inches) note : the values in parentheses are reference values. c 2003 fujitsu limited f48023s-c-3-4 (.013.002) 0.320.05 0.80(.031) m 0.20(.008) 0.10(.004) (.007.002) 0.170.06 10.000.20(.394.008)sq 13.100.40(.516.016)sq 112 13 24 37 48 25 36 index details of "a" part 0.800.20 (.031.008) 0.880.15 (.035.006) 0.25(.010) .008 C.008 +.004 C0.20 +0.10 0.20 (stand off) 1.95 +0.40 C0.20 +.016 C.008 .077 (mounting height) 0~8 ? "a" 0.10(.004) *
mb89210 series 49 (continued) 48-pin ceramic mqfp (mqp-48c-p02) dimensions in mm (inches) note : the values in parentheses are reference values. c 2003 fujitsu limited m48002sc-1-1 14.820.35 sq (.583.014) sq 15.000.25 sq (.591.010) sq 17.20(.677)typ pin no.1 index typ 10.92(.430) 1.020.13 (.040.005) 7.14(.281) typ 4.50(.177)typ 0.150.05 (.006.002) 9.02(.355)max 1.10 +0.45 C0.25 +.018 C.010 .043 0.400.10 (.016.004) 0.800.25 (.0315.010) 8.80(.346)typ 10.92(.430) typ 1.020.13 (.040.005) 0.30(.012)typ 7.14(.281) typ 0.30(.012) 1.00(.040)typ 1.50(.059)typ 0.800.25 (.0315.010) 8.80(.346) typ 17.20(.677) typ .043 1.10 +0.45 C.010 +.018 C0.25 0.400.10 (.016.004) 1.00(.040)typ 1.50(.059)typ typ index area
mb89210 series fujitsu limited all rights reserved. the contents of this document are subject to change without notice. customers are advised to consult with fujitsu sales representatives before ordering. the information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of fujitsu semiconductor device; fujitsu does not warrant proper operation of the device with respect to use based on such information. when you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. fujitsu assumes no liability for any damages whatsoever arising out of the use of the information. any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of fujitsu or any third party or does fujitsu warrant non-infringement of any third-partys intellectual property right or other right by using such information. fujitsu assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. the products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). please note that fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. any semiconductor devices have an inherent chance of failure. you must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. if any products described in this document represent goods or technologies subject to certain restrictions on export under the foreign exchange and foreign trade law of japan, the prior authorization by japanese government will be required for export of those products from japan. f0405 ? fujitsu limited printed in japan

▲Up To Search▲

Price & Availability of MB89215

	To Download MB89215 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .